1. Field of the Invention
The present invention is related to a semiconductor wafer, semiconductor element and a method of manufacturing the semiconductor element. In particular, the present invention is related to a semiconductor wafer on which a compound semiconductor is formed on a substrate using an epitaxial growth method, and a semiconductor element such as HEMT, SBD (schottky barrier diode) and LED (Light emitting diode) formed using the semiconductor wafer and a method of manufacturing the semiconductor element.
2. Description of the Related Art
A wafer on which a nitride semiconductor is formed using an epitaxial growth method on a substrate (referred to simply as silicon substrate herein) comprised of silicon is disclosed in Japan Laid Open Patent 2003-59948 (Patent Document 1). A silicon substrate has the advantage of low cost compared to a sapphire substrate. However, a linear expansion coefficient of a silicon substrate is approximately 4.70×10−6/K and the linear expansion coefficient of GaN used as a nitride semiconductor is approximately 5.59×10−6/K so there is a relatively large linear expansion coefficient between the two. In addition, a lattice constant of silicon and a lattice constant of a nitride semiconductor are mutually different. Also, the linear expansion coefficient and lattice constant of a nitride semiconductor other than GaN are different to the silicon substrate. Consequently, when a nitride semiconductor is formed on a silicon substrate, stress is applied to the nitride semiconductor and cracks or dislocations easily occur.
In order to solve this problem, a technology is disclosed in patent document 1 mentioned above in which a buffer region is arranged on a silicon substrate and the region has a multi-layer structure including a first layer comprised of AlN and a second layer comprised of GaN which are alternately arranged and a nitride semiconductor region for forming semiconductor elements is formed on the buffer region by epitaxial growth. Because this multi-layer structured buffer region has good stress relieving effects, it is possible to reduce cracks or dislocations being generated on the nitride semiconductor region for forming semiconductor elements arranged on the buffer region.
In addition, a technology is disclosed in Japan Laid Open Patent 2008-205117 (Patent Document 2) in which stress is generated on a buffer region or nitride semiconductor for forming semiconductor elements when the nitride semiconductor is formed thickly on a substrate using an epitaxial growth method and warping generated on the semiconductor wafer due to this stress is reduced.
The buffer region of the semiconductor wafer disclosed in Patent Document 2 is formed by a plurality of multi-layer structured buffer regions disclosed in Patent Document 1 and a single layer structured buffer region which is alternately arranged between the plurality of multi-layer structured buffer regions. Specifically, a plurality of multi-layer structured buffer regions in which the first layer comprised of AlN and the second layer comprised of GaN are alternately arranged, and a single layer structured buffer region comprised of GaN formed thicker than the second layer and arranged alternately between the plurality of multi-layer structured buffer regions is disclosed in Patent Document 2.
However, in the technology disclosed in Patent Document 2, piezo polarization occurs within the single layer structured buffer region due to stress caused by the difference between the lattice constant of a material which forms the first layer comprised of AlN of a multi-layer structured buffer region and the lattice constant which forms the single layer structured buffer region comprised of GaN, and the single layer structured region suffers from low resistivity. In addition, the single layer structured region suffers from low resistivity due to defects caused by nitrogen holes generated within the single layer structured region. As a result, a current flows easily in a horizontal direction within the single layer structured region which is formed thickly and causes a problem whereby parasitic capacitance generated within the buffer region becomes large.